Using the HMC439 with no reference present and would like to see the PLL drift to the low frequency end consistently. Added some DC offset to the REF input with a 20K resistor to ground, but the loop will still occasionally drift high. The bypass capacitors in place are series resonant at ~ 250 MHz, 1000 pF 55x55 ATC. Would expect the loop to always drift to the low end. Reference at 100 MHz when present. Any explanation why the loop drifts to the high end (REF input oscillating?) would be appreciated.