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AD9122 clocking and sampling rate.

Question asked by Jetmiri on Feb 16, 2015
Latest reply on Jun 5, 2015 by Jetmiri

Hi all,

 

I need to change the DAC sampling rate to 16 MHz of AD9122 in fmcomms1. When I change it on software I see that I will have a sampling rate of 16.1 MHz which is not good for my design. Is there any possibility to set a AD9122 clock to 16 MHz or multiple of this frequency. If not then can I provide the clock directly from the FPGA or any other possibility.

 

Regards,

Jetmir.

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