I have a question about ADV7125 timing specification.
CFTL CN-0282 is indicated as a reference circuit for "DVI/HDMI to VGA Converter".
In this circuit, ADV7611 and ADV7125 are used.
But the timing specification is not match between ADV7611 and ADV7125.
1. Setup/Hold time of ADV7611 digital output data is indicated in table22 of datadsheet(Rev.D)
End of valid data to negative clock edge : t11 = 1.0ns(typ), 2.2ns(max)
("Setup Time" is a little shorter than above because t11 include a time from the end of valid data to cross point.)
Negative clock edge to start of valid data : t12 = 0.0ns(typ, 0.3ns(max)
("Hold Time" is a little shorter than above because t12 include a time from the cross point to valid next data.)
2. Setup/Hold time of ADV7125 digital input is indicated in table-4 of datasheet(Rev.C)
Data and Control Setup : t1 = 0.2ns(min)
Data and Control Hold : t2 = 1.5ns(min)
t11(setup time of ADV7611) > t1(setup time of AVD7125)
t12(hold time of ADV7611) < t2(hold time of ADV7125) - - - (1)
This relation(1) seems make a problem.
How should I understand this mis-match ?