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AD9102 SRAM Data

Question asked by scn_cascodium on Feb 9, 2015
Latest reply on Feb 10, 2015 by scn_cascodium

Hi,

 

I was looking through the AD9102 datasheet again to figure out how to appropriately format the data for the SRAM, and I found the datasheet rather unhelpful.

 

What is the format of the data in the SRAM? Unsigned? Two's complement?

 

Also, the register map shows bits 15:8 as reserved, and then bits 11:8 and 7:0 as SRAM data. The SRAM is supposed to be 14 bits, correct, not 12? Also, bits 11:8 are covered twice in the description, so there's at least that error. There's also mention of a 4096x12 SRAM on page 18 in the Writing to On-Chip SRAM section as well as a mention of the 4kx14 SRAM on the same page in a later section.

 

Finally, at one point I had changed the evaluation board to talk directly to the AD9102 on the SPI bus and found that writing to the SRAM wasn't as described in the datasheet. The address counter seemed to decrement rather than increment, and the last two bits of the SRAM data registers were reserved, rather than the leading bits as somewhat indicated in the register map. Can you confirm this behavior?

 

Thanks,

 

Sara

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