I have analyzed NO-OS reference design AD-FMCOMMS1-EBZ Quick Start Guide on Xilinx FPGA Boards Without OS [Analog Devices Wiki.
Based on analysis I conclude that when using DMA to feed DAC (dac_dma_setup(fmcSel)) data is just one time stored in DDR and axi_ad9643_adc_data_1 is set in Cyclic mode. So basically DAC is always sending the same set of data.
I want to go beyond that, and want to stream data from PS to PL, basically I want to feed my transmitter with data. Could you give me suggestions how to enable continuous streaming from PS to PL -> transmiter -> DAC . Is there any example? I see that there will be need for sync between PS and PL part. I know that there are some discussions on this topic, but I need more help. So basically if I want to stream data from PS to PL-transmiter-DAC with speed of 250 kb/sec (continuously), how I can do it? I would like to keep and modify Reference Design, rather than building DMA-AXI communication from scratch.