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ADV7180: a shift in vsync without change in lock status?

Question asked by stevel65 on Jan 26, 2015
Latest reply on Jul 9, 2015 by haff

I'm using a NTSC signal source to the ADV7180 on a Freescale SabreAuto reference platform.

 

By stopping and restarting playback of the NTSC source, I can cause the decoded and captured images to show a "split" image (part of two adjacent frames in the same captured image). When this happens, the ADV7180 does not report any loss of horizontal or vertical signal lock.

 

Is it possible for the ADV7180 to shift the vsync output to a new line (i.e. the SAV code is repositioned to a new line) without ever losing signal lock? That could explain the behavior described above. And if so, is there some way to program the ADV7180 to report such an event?


We have are monitoring the following bits, none of which show any change when the split image occurs:


Register 0x10 (STATUS_1) bits 1 and 2 (LOST_LOCK, FSC_LOCK)

Regsiter 0x42 (INT_STATUS_1) bits 0 and 1 (SD LOCK, UNLOCK)

Register 0x4A (INT_STATUS_3) bits 1,2,3 (V_LOCK, H_LOCK, AD_CHNG)


 


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