Because screenshots on http://wiki.analog.com/resources/fpga/docs/hdl are for Vivado 2013.4 and
I'm having issues with tools. built the latest checked out code analogdevicesinc/hdl at hdl_2014_r2 · GitHub with Vivado 2014.2 but then when working with the latest bare-metal sw - no-OS/ad9361/sw at b7f6419ed5ab2ec67431312b814e7ac3fe8afb13 · analogdevicesinc/no-OS · GitHub - with SDK from 2014.2, it keeps crashing...
Probably my issue -
What version of Xilinx tools do you suggest for building and working with latest released HDL and then SDK sw?
Could I safely try with latter tools, 2014.4 you think?