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Modifying the hdl design

Question asked by zxu on Jan 22, 2015
Latest reply on Jan 29, 2015 by zxu

Hi:

     I'm trying to modify the ad9361 RTL design of vc707 to make it fit on the board vc709. Here is the problem: I want to figure out that the order of rx_data_in_p[5:0] and rx_data_in_n[5:0] pins arranged to form the pin P0 [11:0] declared in the reference manual of ad9361. I could not find it in reference manual nor the PCB specification. Thank you for the help.

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