I am using the no-os software to drive the AD9361 from an Artix 7. I notice that there seems be a way to delay the receive data path signals to tune out small timing delays in the the axi_ad9361_dev_if core at a resolution dependent on the delay_clk input. Is it true to say that the dig_tune() function in the no-os software doesn't actually control use this functionality in the core? It instead loads the registers (6d & 7d) in the AD9361 to delay the signals with a resolution of 0.3 ns / lsb? Is the former functionality even used in the ad9361 stuff? If so where?