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AD9364 Xilinx Project

Question asked by Bhaskar on Jan 16, 2015
Latest reply on Jan 16, 2015 by rgetz

Hi Everyone ,

 

1.) Is there a Xilinx ISE project for ad9364 on zc702 zynq eval board ? I require the .ngc files of the project after synthesis  and vivado does not generate .ngc files after synthesis. I will require the .ngc files for partial reconfiguration.

Can anyone provide me with the .ngc files of the project.

 

2.) In case I am using the DAC_DMA mode (where the sine wave samples are read from the PS and goes through the following chain - memory - Dma - util_dac-- ad9364core - FMC card) . The output of DMA is 64 bit . I wanted to know if for both ad9361 and ad9364 DMA has 64 bit of data on its output bus or in case of ad9364 dma output bus has 32 bits of data.

 

3.)I have developed a custom HDL module (DVB S system) .I have connected my HDL code to the input of util_dac (disconnecting the dma - util_dac path). Whenever the util_dac sends a read signal as high , my code sends a samples in the sample and a valid signal in the same manner as the DMA would do in the default condition. Now my question is .  How will arrange the samples and place it in the output 64 bit bus of my custom module . Should it  be in the following way

 

IF my samples are  {1,2,3,4} (such that numbers represents I and Q together respectively) then shall I  place as {2,1,4,3} ?

 

4.) I have been working on NON OS mode till now . If I would like to shift to OS mode how can I create the boot files in case I want use my custom project files which includes my custom module ??

 

Thanks & Regards

Bhaskar Banerjee

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