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Evaluation board AD4360/9 - PLL not locked (?)

Question asked by alopalo on Jan 15, 2015
Latest reply on Jan 19, 2015 by Brigid.Duggan



I've recently bought the evaluation board of the AD4360-9 PLL chip. I have installed the software as recommanded by the application note and I have tried to make it works. I have used the same parameters displayed on the user guide page 8.


On the oscilloscope I see :

- the REFin signal is 19.2 MHz as expected.

- the RFout and RFout/ signals are both 360MHz as expected but not synchronized when the oscilloscope is trigged on the REFin signal.

- the MUXout (A/2 divider selected) is 90 MHz (as expected too) not synchronized either.

- the MUXout (R divider output) is 1.6MHz (as expected) but not stable and not synchronized with the REFin signal - like it jumps from one period to the other.


Though, the sync LED is ON and lock detect signal is HIGH level - which would mean that the PLL is locked. I would have expected to see all the previous mentionned signals to be synchronized.


I have also checked the value of the N and R latches which are OK and coherent with the different frequency inside the PLL.


I finally checked all power supplies which are all good and that RFout and RFout/ are terminated with 50 ohms.


To summarize

The PLL has all theoritical inputs to be locked, it is shown as locked by the LED and the lock-detect signal but none of the intermediate and output signals are synchronized with the RFin input.


Thanks a lot for your help.