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Stray voltage on ADV3002 clock and data lines?

Question asked by Lionelwallace Employee on Jan 12, 2015
Latest reply on Jan 13, 2015 by jmarshma


I have an issue with the ADV3002 HDMI Switch.  The TMDS output signals always have a positive voltage on each of the data and clock lines. This is causing issues on my receiver board.  I disabled the output Termination (register 0x03 = 0xF0) and that brought the voltage down from +2.2V to +0.7V.  I would expect see 0V on those lines in an idle state, however, according to the datasheet we need those terminations turned on to correct reflections, so I have to leave that on anyway.  I also put the ADV3002 in reset just to see what the result would be, and I still get a little leakage (around +0.3V).


How can I eliminate this stray voltage?  Schematics are available for review, but I would need to them e-mail them directly to apps.  I can't post these.


Background:

We were having issues with one of our products receiving an HDMI signal from another of our existing products, and it seemed that if the HDMI input was connected, the board would not power up.  I have narrowed that down to the HDMI transmitting product putting +2.2V out on the TX+/- clock and data lines to the receiving product, and when that receiving product was powered down, the +2.2V was back feeding into the +3.3V rail through the HDMI receiver chip, so when a new power up would occur, the SDRAM never really powered down properly and ended up getting into an unknown state and would load data until the HDMI input cable was removed causing the +3.3V rail to drop enough to reset the SDRAM properly.  That problem is really irrelevant for you, but I thought I’d let you know where I started.

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