I recently tried to initialise a 1761 DSP codec. The Master clock settings were accidentally set to the wrong frequency, 12.286 MHz instead of double this number, on the DSP code extracted by SigmaStudio. The actual MCLK fed to the DSP chip was 24.572 MHz.
When I tried to write the DSP code through I2C on the 1761 and readback it seemed that the DSP wouldn't have these data written on it. When I was reading back the content of the registers of the DSP, the default settings were still there. I am sure my I2C read and write functions work properly.
When I changed the frequency to the right one in the code, then the writing process worked fine. when I read back I read the correct data.
It seems to me that for some reason the 1761 wouldn't accept data with the wrong clock settings. Is that the case? What is the mechanism that prevents these writes if there is any?
I would have expected that even if the MCLK initialisation settings are wrong, the DSP would still get initiated and then it would mess up on run time. Could you please enlighten me if I am missing sth here?
I did not find relevant information on the datasheet of the DSP.