I have enabled the interrupt for changes in the AD_RESULT bit.
When there is no CVBS input provided to the ADV7182 chip, I noticed the register 0x10 AD_RESULT bit is changing in uneven period of time which causes interrupt to occur.
I do not see this problem when the actual input is provided.
Why the AD_RESULT bit is switching the standard between NTSC & PAL when there is no input provided to the ADV7182 chip?
What could be the root cause for this issue?