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ADV7181C : How to a fine adjustment the Vsync output timing (SDP)

Question asked by aimPoint on Jan 7, 2015
Latest reply on Jan 8, 2015 by aimPoint

Hi all


We are developing a video device using a ADV7181C.

We are using the ADV7181C (SDP) for NTSC input.


I had to adjust the Vsync output timing according to the ADV7181C DATASHEET MANUAL Rev.C Page132(PDF page 137).

However, it is necessary to 5.6us timing adjustment on account of image processing devices that are connected to the ADV7181C.


Could you please provide how to do the a fine adjustment of this 5.6us?


Best Regards