We are using ADCMP572 circuit in our design to detect when an input oscillatory signal is crossing a threshold and to perform its 1-bit digitization. The output of the ADCMP572 circuit is connected to the high-speed differential receiver of an FPGA, which we use to sample and store the data.
When performing the experiments, we have realized (repeatedly, on 5 board samples) that ADCMP572 circuit produces a valid differential signal only when one of its inputs is crossing the threshold, but NOT if the signal on its input is never crossing the threshold.
For instance, the circuit works as expected when on one of the inputs we connect a sine signal with the amplitude higher than the threshold. When the amplitude of this sine signal is lower than the threshold, the signal does not cross the threshold, and in this case, the output of the ADCMP572 circuit is not a valid differential signal! Both P and N outputs give the same (common-mode) voltage. Therefore the difference between P and N pins is 0, and the receiver on the FPGA side cannot tell what this signal is. This is causing our hw system to fail functioning.
Why is this happening? Shouldn't the output of the comparator be a valid differential signal regardless of whether the input is crossing the threshold or not? How can we solve this issue in our design?
Thank you in advance!