I am currently configuring the SPDIF receiver in the SHARC DSP to receive an external signal. My question is
Is there anyway to route out the recovered clock from the receiver?
I wanted to have the recovered clock that is locked by the internal digital PLL for other usage.
I understand that i can use the I2S bit clock but it is only clocked at 64* Fs.
I needed at least 128 *Fs which is normally recovered from standalone SPDIF receiver chip.
Please help me to answer the doubt, if there is no way to route the digital PLL clock then I will have to use external PLL to get 128 *Fs.
Thanks in advance.