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ADV7401: can we modify the HS/VS synchronization signals if setting the DEF_VAL_EN bit in 0x0C register

Question asked by fancyfly on Dec 29, 2014
Latest reply on Jan 4, 2015 by fancyfly


If we set the DEF_VAL_EN bit in 0x0C register, the SDP will only output the default value. So in this mode, can we modify the output HS/VS synchronization signals? Thanks.