jon71

ADAU1701 External Delay:  Idle Thoughts on Boxing Day!

Discussion created by jon71 on Dec 26, 2014
Latest reply on Jan 2, 2015 by KJBob

I've been experimenting with concepts of using the serial data outs for SPI control of other ICs, where an ADAU1701 is used in self-boot mode and there is thus no MCU.  This is because my designs are so small I usually don't have space for anything but a handful of other components, and I can't fit an ADAU larger than -1701.

 

My applications are too specific to be of general use, but I had a concept for external delay using an SPI SRAM, as the newer ADAUs can do natively.  This requires four serial data lines; BCLK, one data in & out, and CS (I think this can be a GPIO).

 

Some time ago KJBob helped me describe a method for using downsampling with -1701's internal delay to extend the initial delay for a reasonable reverb. See here for an example of downsampling with the internal buffer:

 

https://ez.analog.com/message/74499#74499

 

Using an extension of this technique, an external delay has the advantage of a delay time limited only by the external SRAM addresses (64K, for 16K sample delay).  This is a fourfold increase!

 

The SigmaStudio program would involve a counter that is used to encode the memory address for the read/write commands, and transmitting that command as an audio sample, followed by several samples of actual audio data.  It would have to use -1701's internal buffer to read & write a page of bytes back and forth to the SRAM--this would be a short buffer that has to multiplex & demultiplex the mono audio from the stereo data stream, using the technique in the link above.

 

It takes -1701 five sample periods to read or write a full page, which is eight (mono) samples of data (because -1701 only addresses 24 bits in a 32 bit word), plus another period to toggle CS between commands, so an eight sample roundtrip takes twelve sample periods.  Probably easiest to downsample for six samples in that period.

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