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About HMC764LP6CE frequency lock and phase noise issue

Question asked by kenton.chu@anstek.com.tw on Dec 19, 2014
Latest reply on Jan 16, 2015 by rbrennan

Dear Sir,

 

We found the problem for HMC764 on frequency locking under integrated mode & bad phase noise once locked.Below is our inquiry, pls help to clarify. Thanks.

1. How is the register setting sequence due to can't find it on datasheet ? Below is our register setting & writing sequence.

   1) 00h 1 RST

   2) 02h 3 R=3

   3) 03h 174 N=372

   4) 0Bh 878 negative slope

      Fref: 30MHz (external SG)   Fout: 7.44GHz

2.How to turn on frac-N mode ? As datasheet description as below, it doesn't work while setting reg 9 [9:7] to "100" (for 220uA charge pump offset) & 011 for reg 6[12:10].

           Note: To Enable Frac Mode:  Set Reg 6 [12:10]= 011

            Also, Reg 9[9:7] or Reg 9[4:2] must be adjusted to mitigate spurs in frac mode (Dn or Up Leakage)

3.For N value described as below, it shouldn't need to divide by 2. In reality, the value of N needs to divide by 2 as above "N=372" for     7.44GHz frequency out. If I misunderstand for it ?

HMC764_N.jpg

4.For phase noise and loop filter is as below once lock ,it really bad on SSB. Do you have some recommend for it ?

IMG_20141219_153731.jpg

Loop filter set.jpg

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