I have been using the ADV7619 to detect interlaced modes and am having some trouble setting the VS_OUT_SEL register.
I have successfully had the chip tell me it has detected and is processing an interlaced input by reading CP_INTERLACED bit in the I/O map, 0x12.
However when I set VS_OUT_SEL (I/O,0x6) to output FIELD it only appears to only ever output a VS on that pin?
Am I missing something?
I know I could do field detection manually by monitoring the syncs, but I am trying to avoid any manual intervention since the rest of the video mode detection in this chip appears to be accurate for all video modes that I've tried.