In the Rev A data sheet for the ADCMP582, there is a figure that illustrates a method for disabling the latch feature.
Here's the figure:
I plan to use this device with Vcco=+3.3V.
The LE pin is shown connected to Vcco via a 750 Ohm resistor. Since the LE pin is terminated to VTT by 50 Ohms,
I calculate the voltage at the LE pin will be +1.4V.
The complimentary LE input, I'll call it LEBAR is connected to VTT, giving LEBAR=+1.3V.
So we see that LE is HIGH and LEBAR is LOW. This should disable the latch feature. Good.
My question is this: Is Figure 23 incorrect?
I ask this because the minimum Latch Enable Input Differential Voltage given in Table 1 for the ADCMP582 in PECL mode
is 200mV. The circuit of Figure 23 produces a differential of 100mV.
There is no discussion of Figure 23 in the data sheet.