I'm working on a project that needs to synchronize multiple AD9625-2.5 chips across multiple FPGAs. I plan on having one FPGA control two AD9625 chips. I will have eight FPGAs in the entire system for a total of 16 ADC chips in the entire system. Let's assume I use the SYSREF input to time stamp all the ADC chips so I can get them synchronized in the high speed clock domain (clocking at 2.5 GHz). Once I get them synchronized, I would like to put each ADC in DDC mode and decimate by 16. However, it doesn't seem like I can reset the NCO on each ADC chip synchronously. I need all ADC chip NCOs to be at the same phase across the system. Is this possible?