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Communication with camera via PPI - different VSYNC signalization

Question asked by ksiadz13 on Dec 13, 2014
Latest reply on Feb 17, 2016 by fabian_sl

Hi

 

I am working with BF526 EZLITE. I am trying to capture image from OV7670 using PPI in 2 external frame syncs mode.

All the time I have 2 faults in PPI status register - Horizontal Tracking Underflow Error and Frame Track Error. These mean that processor detect HSYNC and VSYNC signals before counters with lines and pixels per lines expired. I observed that the same situation happened also when i set counts on really small values so i checked all signals from camera with osciloscope but everything seems to be ok.

Then I analyzed waveforms of these signals for camera and processor and I observed some diffrences beetwen frame signalization. The camera signals the start and the end of a frame by short active signals. Processor recognized start of the frame when assertion of vertical frame sync is followed by the assertion of horizontal frame sync and vertical frame sync is active during the whole communication process. I added pictures which ilustrate this difference (HSYNC = HREF = FS1 = horizontal sync; VSYNC = FS2 = vertical sync).

I know that I can invert polarity of these signals with POLS bit in PPI register but it doesn't solve this problem. Am I right that this may be a cause of communication problems? What should I do?


I will be grateful for your help.

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