I am having some problems getting my ADSP-21478 SHARC processor to execute a boot kernel in SPI Slave boot mode.
Initially, I performed some tests using the standard 21479.asm boot kernel, but for debugging purposes I created a custom boot kernel which essentially contains a bunch of nops, an rti instruction at offset 0x8c030 (spi interrupt vector location) and some very basic code to toggle some FLAG pins. I have attached the kernel project as well as my program to this post for reference. The map file shows that the rti instruction is located at the correct memory location, which I later confirmed by viewing the ldr file (found in the program's "Release" directory) in a hex editor.
So far, all flag pins appear to be floating after the data has been transmitted, leading me to believe that either the boot kernel is not executed correctly or that the spi transmission is not successful.
A custom board on which a 16bit SPI master is being used to send the kernel data ensures that the BOOT_CFG pins are 00 and that CLK_CFG pin is 0. The screenshot of my logic analyser below confirms that the chip resets correctly and that the resetout signal is asserted after a short amount of time. It also shows the slave select line (DPI04) being pulled low prior to transmission. I then send the data in 16bit chunks to the DPI01, clock on DPI03.
Could somebody please confirm that the kernel I attached should normally work? I have attached a second screenshot below showing the transmission of the first few instructions over the SPI interface. Is the order of the words correct when crossreferencing with the ldr file, or am I transmitting them incorrectly?
Note that I have also tried toggling the slave select line between each 32 bit word and this does not seem to help either. I have also tried booting the standard kernel and placing my pin toggling instructions in the user_init label - same result. I am starting to run out of ideas and hope you can help me with this issue.