Could you elaborate on a function of PWM rising edge timing(0xFE0C) and setting(0xFE0D) registers?
I don't understand its function from only description on ADP1048 datasheet.
Sorry that it is actually not descrided clearly in the datasheet.
In ADP1048, the rising eage timing is calculated by:
t1= (PWM register value 0xFE0C[7:0] x 2^2 + 0xFE0D[3:2]) x 40ns.
The Register 0xFE0C[7:0] is the 8MSBs value and the Register 0xFE0D[3:2] is the 2LSBs value. Each LSB is equal to 40ns.
Please let me know if you still have question.
Thanks for your answer.
But I have a question. As I know of, PWM is that a pulse width varies keeping its frequency constant.
According to what you say, t1 looks like varying, which makes frequency change.
t1 is the rising timing position while t2 is the falling timing position. Both t1 and t2 will not determine the swtiching period. In ADP1048, the swtiching frequency (and switching period) is a constant and can me programmed by Register 0xFE1B. If you do not enable the modulation, the PWM pulse width is (t2-t1), which is a fixed value. However, both the rising eage and falling edge can be programmed as modulation. If t2 is programmed as "modulation", then the t2 falling edge will change with an offset determined by the digital compensator. And the direction (move left or move right) of the modulation will be determined by Register 0xFE0D.
Hopefully it will be clear to you now.
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