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UART line status register

Question asked by KRZ on Dec 3, 2014
Latest reply on Mar 11, 2015 by KRZ

I am using DMA transfers to receive an unknown amount of data over the UART0 of an ADSP-21489.

To get around the variable length issue I'm trying to use a line break on the UART serial port to frame my communication packets.

So the DMA is either stopped by receiving the maximum amount of data, which in most cases would be an error, or by a line break interrupt.

The UART is set up for one Start, 8 data no parity and one stop bit and is running at 2.5Mbd.

The line breaks I am generating on the host side are 11 bits low.

The problem is that I get a framing error before I get a line break interrupt and I can't individually mask the interrupts...


A couple of questions:


How many bits does the line need to stay low to generate a break interrupt (table A-124 in the HW reference says "more than the maximum word length", but what exactly does maximum word length mean here?


Does the DMA transfer a word into memory if any of the errors occur or are they ignored?


There are two solutions that I can think of:

Either check if the data received for the framing error was 0x00. The location to get this data from would depend on if the DMA transfers it or not in the presence of a framing error.

The alternative is to wait however many extra bit times are required to see if the framing error also generates a break interrupt.

This is not ideal as it would be inside the interrupt handler. For this I would need to know what the minimum wait time is.