This discussion is related to the following discussions.
1. Digital reset is recommended even when DCS is enable.
In spite of this, why do not included the time required to digital reset for return time on the data sheet?
2. I got a comment below;
"If the clock is stopped and re-started, I think it is safest to perform a digital reset. If the clock is stopped and started perfectly
cleanly, this might not be necessary but I still think it is safest to do a digital reset after any clock interruption."
(Data sheet Page 22, "POWER DISSIPATION AND POWER-DOWNMODE")
Low power dissipation in power-down mode isachieved by shutting down the reference, reference buffer, biasing networks,
and clock. Internal capacitors are discharged when entering power-down mode and then must be recharged when returning
to normal operation.
When stop internal clock, why need a digital reset despite recovery time is only 375us?
3. I hope that you will add the following informations to the data sheet. Is this possible?
 Required time to return from the digital reset
 Required time to the power on reset (= digital reset recovery time)
 Digital reset recommended that when there is a change in the input clock