Our customer is studying for your AD7760 ADC.
So I got the question from customer.
If the input signal is switched by external MUX, then the switched signal delay time come from (more than the internal calculation delay time + the internal filter delay(transient delay)), correct?
If so, If the waiting time become 23usec when internal clock(ICLK)=12MHz, then we need to pass the internal filter, customer think.
So can AD7760 set the value of decimation with doesnt depend on internal clock?