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ADV7604 - Unstable hsync on output pixel port

Question asked by mra on Nov 24, 2014
Latest reply on Jan 13, 2015 by mra

We have connected a 1080p50 source to a ADV7604 receiver. Sometimes the video output displayed on the monitor gets unstable, and when we measure the signal on the pixel port output of ADV7604 with a oscilloscope, we see that the hsync signal disappears from time to time.

 

With a Flir InfraCam we have measured the point of the package with the highest temperature to 65 ºC, which is even below the max rating for ambient temperature (70 ºC). But the problems seems to be related to temperature anyway, because if we put a finger on the chip or spray lightly with cooling spray the problem disappears. The problem will not appear again until we reconfigure the chip or increase the temperature of the receiver above the normal level.

 

I have attached register dumps when the signal is unstable, and when it is stable after we cooled the receiver slightly by touching it for a second. I have noticed that PKV_CHA (CP map register 0xEE, "Maximum signal level measured during the active video on channel A.") doesn't have the same level as channel B and C when the signal is unstable.

 

Do you have a solution for our problem?

 

Best Regards,

Mats Randgaard

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