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ADV212 problem

Question asked by Larin on Nov 14, 2014
Latest reply on Dec 24, 2014 by llc

Hello!

 

I attempt to use ADV212 chip for photo camera board.

 

12-bit VDATA bus is pixel interface, 16-bit HDATA bus is host interface and compressed data interface (DMA 0).
DMA 1 is not used.

 

Frequencies: MCLK = 31.25MHz, VCLK = 62.5MHz, JCLK = 125MHz, HCLK = 62.5MHz. PLL is configured as:

PLL_HI = 0x0098 (HCLK divider enable, ACK is open drain)
PLL_LO = 0x0004 (PLLMULT = 4)

 

I use routine from Programming Guide and I load program (encode_2_18_3COMP_0.sea) into ADV212 successfully.
SWFLAG = 0xFF82 after assertion EIRQFLG[10], CHIP ID = 0x27DB, Hardware revision = 0x0205, EIRQFLG = 0x40f.

 

But encoding doesn`t work. I changed encode parameters and indirect registers values and did not obtain
correct compession of input pixels. The main dificulties:

1. ADV212 doesn`t assert DREQ0 if burst DMA mode is used. EDMODE0 register has values:
DMEN0 = 0/1 (disable/enable), DMSEL0 = 01 (compress data), DR0POL = 0 (low polarity of DREQ0/FSQ0),
DA0POL = 0 (low polarity of DACK0/FCS0), DR0PULS = 0 (DREQ0 is asserted until DACK0).
   If I use DMMOD0 = 010 (burst transfer) DREQ0 is not asserted. If I use DMMODE = 000 or 001, DMA transfer
   may be requested by ADV212.

2. Image must be transferred into ADV212 in RAW pixel mode. Accordingly datasheet RAW pixel mode timing
   VSTRB is set in high level and the state machine waits high level on the pin VRDY. But ADV212 holds this
   pin low and image transfer is not begins.

 

I think that I load incorrect parameters of encode or indirect registers values. There is one thing
in examples of Programming guide that I can not understand. RAW pixel mode routine loads encode parameters
and indirect registers when BUSMODE = 0x0025 and MMODE = 0x0009. This value of MMODE signs that IADDR is
autoincremented on 32-bits. Indirect registers have addresses on 32-bit boundaries and this autoincrement
is clear. But encode parameters have offsets 0,1,2,.... therefore parameters with offset 2,3 (for example)
can not be written with MMODE = 9 and routine from Programming guide (load STAGE, load IADDR, load IDATA,
load IDATA, ....). Now I load STAGE and IADDR before every 16-bit data transfer, but ADV212 doesn`t work
better.

 

Encode parameters of my last attempt:
0x00057F00 = 0x0400
0x00057F02 = 0x0303
0x00057F04 = 0x0301
0x00057F06 = 0x0000
0x00057F08 = 0x0000
0x00057F0C = 0x4E00
0x00057F00 = 0xF300

 

Indirect registers:
PMODE1  = 0x0004
PMODE2  = 0x003E
VMODE   = 0x0022
EDMODE0 = 0x0002 (0x0003)
FFTHRC  = 0x0002
PIXEL_START = 1
PIXEL_END = XTOT = 128
V0_START = 1
V0_END = YTOT = 64
V1_START = default
V1_END = default

 

I wanted to encode RAW image 128x64 monochrome pixels, 8-bit pixel. After clear flags of EIRQFLG (start
compression)  ADV212 holds VRDY high (I think that VRDY is configured as input and this level is done by
pull-up resistor). I asserts VSTRB high and transfer 128x64 pixels. DREQ0 is not asserted by ADV212,
after 0.5 sec pause I stop wait and read from EIRQFLG value 0x400D. Bits 14 and 3 of this register are
reserved and are not documented.

 

Excuse me my poor English.


 

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