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Adding OffChipDelay functionality into CrossCore application

Question asked by JinJin on Nov 13, 2014
Latest reply on Mar 4, 2018 by 江湖中已没了哥

Hi,

 

I am going to add a OffChipDelay functionality into SigmaStudio schematic and CrossCore application.

 

I have already read  <Off Chip Delay (External Port)> (https://ez.analog.com/message/158406#158406) and added OffChipDelay Module into SS app. But I can't find a way how to set the address of the buffer in the "Ext Buff Ptr" field and to add related codes into CrossCore app.

 

Should I declare a array buffer for offchipdelay func in CCES code?

If so, what SDRAM memory address can I enter in the "Ext Buff Ptr" field into SS schematic?

 

 

Any words from you will be much appreciated and helpful to me.

 

Best Regards.

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