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Primary SPI DMAs not functioning after LinkPort Booting

Question asked by jhenders on Oct 15, 2010
Latest reply on Oct 18, 2010 by DivyaS

SHARC 21469 connected to PIC uController via primary SPI as slave. DSP is set up to receive 32 bit words from PIC via non chained DMA.

 

The following code works when loading and running from the ICE:

 

*pSPICTL = 0;
*pSPICTL = TXFLSH | RXFLSH;
*pSPIDMAC = 0;
*pSPIDMAC = FIFOFLSH;
*pSPISTAT = 0xFF;

 

*pSPICTL = RXFLSH;

 

interrupt(SIG_P1 /*SIG_SPIH*/, PICrxIsr);

 

*pCSPI = 1;      
*pIMSPI = 1;
*pIISPI = (int) (&pic_spi_buffers[m_num_pic_blks_rcvd&(num_pic_buffers-1)][0]);

 

*pSPICTL = MSBF | WL32 | TIMOD2 | SPIEN;
*pSPIDMAC = SPIDEN | SPIRCV | INTEN;

 

When loading the .ldr file via link port booting from the PIC, it does not work. The booting works but the SPI comms do not. Without the PIC sending anything after boot this is what the registers give:

 

SPIDMAC = 0x8007

SPIFLG    = 0x0F80

SPISTAT  = 0x0001

SPICTL    = 0x4302

 

After the PIC sending 32 bits:

 

SPIDMAC = 0x2007

SPIFLG    = 0x0F80

SPISTAT  = 0x0085

SPICTL    = 0x4302

 

After sending another 32 bits:

 

SPIDMAC = 0x3007

SPIFLG    = 0x0F80

SPISTAT  = 0x00B5

SPICTL    = 0x4302

 

So it looks like the DMA is set up but the FIFOs and buffers are overflowing. I send an email on the 13th that has gone unanswered, but these register values are more correct in this post as I was going from memory in the email. I would like any support to continue on this thread for the benefit of others.

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