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AD9467EBZ ref design

Question asked by smutha on Nov 8, 2014
Latest reply on Nov 12, 2014 by rejeesh


     I hope these queries haven't been answered in some other thread (I tried searching for them but couldn't find any).

1) The custom peripheral added to the AXI bus in XPS is axi_adc_1c_0. This peripheral internally instantiates the following blocks user_logic (toplevel file), cf_adc_1c, cf_adc_if (interface module to the adc), cf_dma_wr, cf_mem, cf_spi.

I tried deciphering what cf_dma_wr and cf_spi did but couldn't understand much (especially since axi_dma & axi_spi have been generated from the IP catalog). May I ask someone to please explain their role?


2) The point where I am confused is in the standard process to generate an axi peripheral, the options are axi_lite, axi_burst & axi_stream and the axi_adc_1c_0 doesn't fall into any of these categories (because it has the S_AXIS_S2MM ports). Then how is it generated?


Thank you for answering my queries, it will be a big help.