I have a FPGA driving a RGB bus to a ADV7125; which connects to a standard VGA port.
It produces the CLOCK, DATA, DE, HSYNC, and VSYNC.
But the ADV7125 has composite (?) BLANK# and SYNC#
Should I bypass the ADV7125 and send my HSYNC and VSYNC directly to the VGA port (through 3.3V-5V level translators)?
I believe I should just tie SYNC# to logic low.
What should be done with the BLANK# signal?