We are using the ADSP-TS201 processor and are interfacing with an FPGA through the LVDS Link ports.
I'd like to simulate this interface with the LVDS H-SPICE model. On the website there are ibis models with the following note: "Note: These IBIS models should not be used to simulate LVDS link ports. HSPICE models for the LVDS link ports are available on request".
Could you provide me with this model?