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Ref Design KC705 AD9364 Role of DDR3 cntrl and DMA

Question asked by bhatnagar.vaibhav81 on Oct 30, 2014
Latest reply on Nov 24, 2014 by CsomI

Hello,

I am using kintex evaluation board KC705 with AD9364. I run the example design it works well.

 

But,I have two questions :

1. Regarding Reference design:

 

I do not have a good understanding of your reference design since it includes too many IPs, on top the logic inside is in verilog.

To be honest I do not have understanding of verilog, I am unable to understand the tx and rx chain.

Is it possible to get a detailed descriptions of these IPs?

 

2. Regarding DDR3.

 

. I want to understand the role of dma and DDR3 in the reference design.

As I see there is ddr3 (MIG) that produces all the parameters for DDR3 (clk, dq, dm, ba, etc.).

My question is that what is the role of DMA and how can I fee my data to DDR3, where are the definition parameters are they in dac_core.h if yes why?

How it is related to MIG?

 

If I want to write my dac data to DDR3 how it is possible?

 

Any help would be appreciated.

 

BR./

 

Vaibhav

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