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AD9361 Quadrature Calibration issue

Question asked by andrew.dickson on Oct 29, 2014
Latest reply on Nov 14, 2014 by DragosB

Hi Dragos,

 

I've opened up a new private discussion as a follow on from yesterday's fix (you may recall?). I managed to test the following frequency options with the FMCOMMS3 No-OS (Xilinx Zynq project).

 

However, it still seems that I have TX quad/dc calibration issues for the lower ADC (DAC) clock frequency, although I can't see any problems from the debug except for the frequency highlighted below which still seems to have issue.

 

These are the TX & RX clock chain options in main.c that I used:

 

{960000000, 240000000, 80000000, 40000000, 40000000, 40000000} - OK no issues

{960000000, 240000000, 80000000, 40000000, 20000000, 20000000} - OK no issues (see picture A attached)

{960000000, 120000000, 40000000, 40000000, 40000000, 40000000} -- Calibration Timeout (0x16, 0x2)

{960000000, 120000000, 40000000, 20000000, 20000000, 20000000} - I/Q/DC issues (see picture B attached)

{960000000, 120000000, 40000000, 20000000, 10000000, 10000000} - I/Q/DC issues (see picture C attached)

 

My FPGA design is simply an I/Q DDS tone (Sin/cos) synchronously clocked out at the sample/data clock rate provided by the 9361.

 

Please find attached pictures of the results seen on a spectrum analyser.

 

Kind Regards,

Andy

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