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SYSREF duration for AD9625

Question asked by delboy on Oct 23, 2014
Latest reply on Oct 23, 2014 by IanB

Are there any issues on the AD9625 with having a SYSREF duration which is an integer multiple  ( 2 or greater)  of the sampling clock period, assuming that the timing of the edges of the pulse meet the required setup/hold times with respect to the sampling clock?


The literature all implies that devices only use the rising edge of SYSREF, which implies to me that the actual width shouldn't be important as long as it meets timing, but there is nothing definitive in any of the stuff I've read so far.