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LF insensitivity in AD835

Question asked by Fredrik on Oct 23, 2014
Latest reply on Nov 18, 2014 by Fredrik

I am experiencing insensitivity with the AD835 at frequencies below 10 kHz. In
the design, the X2,Y2, and Z inputs are all grounded.
At the Y1 input, a DDS generated sinusoidal 0.8Vpp signal (reference signal) is present.
At the X1 input, a signal of the same frequency (and constant phase) as the Y2
signal is present, but its amplitude and phase lag can be changed.
At 380 Hz for example, the DC level at the W output is virtually unchanged,
even if I change the X1 input amplitude by 50 mV (from 0.400V to 0.450V).
When replacing it with the AD630, I  achieve much greater sensitivity at this frequency,
more in line with theory of lock-in amplification. Is this a known issue with
the AD835? Does anybody recognize this behaviour?