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AD9361 startup sequence into FDD state

Question asked by labianco on Oct 22, 2014
Latest reply on Jan 29, 2015 by rgetz

Guys:

 

I am writing some drivers for this device for a custom design and cannot seem to get the chip to move into the FDD mode. I am operating the device in FDD mode and am using the SPI to control the ENSM instead of external signals:

 

I have initialized registers 0x009 [17h], 0x014[0Fh], 0x015[04h] upon power up and then triggered the initial calibrations using register 0x016[FFh].  After this, I  write to 0x014 [23h] to set the "FORCE_TX_ON" bit set then read 0x017 to find out what state it is in. It replies with state 1 for calibrations [done] and 5 [alert] for ENSM.  I have tried different settings, but can not seem to get the system to enter into the FDD state.

 

Thanks,

Nick

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