We interfaced AD9361 board Zynq processing system (sys-ps7).
The analog module we used is fmcomms2 and we could see peak at 2.4GHZ, but we could not capture data after exporting to Hardware.
Can you please help regarding this
Sorry for the delay. Yes, you can use the mentioned projects.
Please note that if AD9364 is used instead of AD9361 the following changes are required to the default_init_param structure:
- two_rx_two_tx_mode_enable has to be set to 0
- two_t_two_r_timing_enable has to be set to 0
For helping you, we need more information: from where did you download the reference design, what version of Vivado did you use, what errors did you get, did you use Linux or no-OS, etc?
The HDL reference design was downloaded from the link https://github.com/analogdevicesinc/hdl/tree/hdl_2014_r1
The source code was downloaded from the link https://github.com/analogdevicesinc/no-OS/tree/2014_R1/ad9361/sw
Vivado Version is 2013.4
We are using bare-metal.
Also, we are using AD9364 RF Hardware and fmcomms4 analog module.
It appears that ADC DMA is not getting completed. The following while loop from function adc_capture(..) is not getting done:
/* Wait until the transfer with the ID transfer_id is completed. */
while((reg_val & (1 << transfer_id)) != (1 << transfer_id));
Also, can you please tell me the latest release Design of fmcomms4 board with zynq ZC706 ps.
You can download the latest stable version from the 2014_R1 repositories (HDL: analogdevicesinc/hdl at hdl_2014_r1 · GitHub, no-OS: analogdevicesinc/no-OS at 2014_R1 · GitHub).
Which Version of Vivado should I use for this Version.
You have to use Vivado 2013.4.
Thank you DragosB
After Writing Bitstream to the Hardware, can we use the latest version.
Are you all set with your issue.
Is the board up and running for you?
We have already done that. But, still we could not solve the problem.
Retrieving data ...