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FRACTIONAL-N PLL WITH INTEGRATED VCO (HMC835LP6GE), SPI read back gives REG 0 value (C7701A h) if read from any register.

Question asked by Anil.92 on Oct 20, 2014
Latest reply on Jul 12, 2015 by punk77

Hi All.

I'm Using FRACTIONAL-N PLL WITH INTEGRATED VCO (HMC835LP6GE) to produce the output frequency from 500 MHz to 3500 MHz.

When I use HMC835LP6G Evaluation Board and  USB Interface Board with Hittite PLL Eval Software, I'm able to do the SPI write read also able to get the correct output frequency and lock detect.

I replace the USB Interface Board with Actel FPGA board to produce the SPI cycle to HMC835LP6G Evaluation Board.

As a Start up when I do the SPI read I'm Getting Register 0 data on the SDO line eventhough I do the read from register 6.

The SPI read cycle is as follows.

1. Wait for 50 ms

2. Write to REG 0 with value 0x6.

3. Write to REG 0 with value 0x6.

I have used open mode SPI.

I obseved the SPI cycle and the signal volatge levels are same between SPI cycle produced by USB Interface Board and Actel FPGA board. I have attched the Block diagram of my connection and Snapshot of SPI write cycle (SCK and SDI).

SPI clock frequency : 1 MHz

Please help me out to solve this issue.



Thanks in Advance