Hello, ADI Support Team
I'd like to calculate a Jitter Level (?ns) of final DAC Output about ADV7390.
This purpose is that I want to confirm whether it is met for a final specification of the system or not.
In my system, an input 27MHz Xtal tolerance is ±30ppm.
In this case, can you calculate the Jitter Level of final DAC Output?
I guess it should be considered about PLL tolerance, effect of oversampling(x16) and so on.
Could you teach the Jitter Level and an attitude of calculation way, please?
Best regards, TomY