My first question is: BF703 datasheet mentioned that DMC_VREF should connect to half of the VDD_DMC voltage. For DDR2, in EZ-KIT, the VREF of DDR2 connects to DMC_VREF which is also connected by a half voltage divider; but for LPDDR, it has no VREF. My question is that: should DMC_VREF be connected to half of the VDD_DMC voltage still for connecting to LPDDR? thanks.
My second question is: BF703 datasheet mentioned that LDQS and UDQS require a 100k pull-down resistor for LPDDR. I want to know why because I checked that the datasheet of LPDDR and ARM chips don’t have such requirement.