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Latches in util_adc_pack.v

Question asked by njp on Oct 15, 2014
Latest reply on Oct 17, 2014 by AdrianC

Could you guys please remove the latches in util_adc_pack.v on the master "hdl" repo?  They are on the signals "temp_data_0" and "temp_data_1".  Thanks.

 

WARNING: [Synth 8-327] inferring latch for variable 'temp_data_1_reg' [.../analog.com/util_adc_pack_v1_0/.../util_adc_pack.v:227]

WARNING: [Synth 8-327] inferring latch for variable 'temp_data_0_reg' [.../analog.com/util_adc_pack_v1_0/.../util_adc_pack.v:186]

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