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AD7195: Set OutputData rate problem

Question asked by Ahygoon on Oct 14, 2014
Latest reply on Oct 15, 2014 by Ahygoon



I'm using an AD7195 for my application. Everythings are OK since I found a problem.


I want to configure a output data rate around 400Hz.

I write this configuration in the registers:

Mode register: 0x142003


     CKL externe on MCLK2: provided by another AD7195 on the same board.

     SINC = use Sinc4 filter

     ENPAR: to check data

     FS = 3

Configuration register: 0x803058

     CHOP enable

     Channel AIN1/AINCOM + AIN2/AINCOM => 2 channels measured




     GAIN is 1 => 0-5V


The registers are OK, I follow each write operation with a read operation to check if the content is well written. (=> I assume the register are OK in the device).

For me the configuration give a 400Hz output rate (my calculation works for all other cases i make until now).

But the real output data rate is 200Hz instead of the expected 400Hz.


I try to configure Mode register first then Configuration register first, but it doesn't change anythings.

1: Do the order of mode and config register have an influence?


The only difference from my other use case is that I have 2 channels here.

When I configure only 1 (AIN1/AINCOM) the output rate is correct (400Hz).

2: I was expecting a data (falling edge of RDY pin) for each channel. Do i right?


Then I check the measured data:

     Each 5ms (200Hz!) I got a falling edge of RDY. 1 For channel 4 (AIN1/AINCOM) and measure is correct.

     Then next received data is for channel 5 (AIN2/AINCOM) but with an error activated. (Voltage on the pin is 1.75V and shall be OK)


3: Can you explain what I see?

4: Any solution ?


Thanks in advance for your help,