Question from customer
The AD9779 maximum digital data rate and its clocking architecture to produce required center frequencies … DATA<->REFCLK<->InterPolation<->QImod<->fc? Can data be clocked by the REFCLK?
I am not sure I fully understand your question. In general, data is typically sent from a data source such as an FPGA. It is received by the DAC and gets interpolated and synthesized. Interpolation does not shift the signal frequency. Modulation does. REFCLK is a clock that drives the DAC PLL which in turn generates a DAC clock for synthesizing the data.
Retrieving data ...