I have an issue with synchronization of 3x ADE7913.
I use uC with SPI clocks 6 MHz or 3 MHz. I can't use 6 MHz SPI clocks due to ADE7913 has 5.6 MHz SCLK limit. So I use 3 MHz for SCLK.
When 3x ADE7913 are used I can't read all data during 125 us (8 kSPS) time slot. I read data by using SPI Read Operation in Burst Mode (128 bit per ADE7913). For my configuration reading time is 3*(1/3000000Hz)*128bit=128 us. 128 us > 125 us (8 kSPS) and I can't read data from 3x ADE7913 during 125 us time slot.
When I decrease sampling rate by factor 2 (4 kSPS or 250 us for reading data) I get some issues.
1st issue. CRC issue.
I get wrong CRC when I use any other than 8 kSPS sampling rate. For example, when 4 kSPS is used, CRC is correct only when reading time is close to the end of sampling period.
Below you can see timing diagrams (for 8kHz and 4kHz).
Channel 1 (yellow) - DREADY from ADE7913.
Channel 2 (red) - NCS from uC. Here you can estimate data reading start time and data reading duration.
Channel 3 (blue) - CRC error. Active High level is set when ADE7913 CRC and calculated CRC are not equal.
4 kHz (4 kSPS):
Could you please comment this issue?
2nd issue. Unsynchronized DREADY is observed when several ADE7913 are working with different sampling frequencies.
For example, if 1st ADE7913 is working at 8 kSPS and 2nd ADE7913 at 4 kSPS then DREADY signals are unsynchronized. Below you can see timing diagram.
Channel 1 (yellow) - NCS from uC. Broadcast write 0x01 to SYNC_SNAP.
Channel 2 (red) - DREADY from ADE7913 (8 kHz).
Channel 3 (blue) - DREADY from ADE7913 (4 kHz).
How could 8 kHz ADE7913 and 4 kHz ADE7913 work synchronously? If yes, could you provide me correct method? Thank you in advance.
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