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Multi channel operation (ACM)

Question asked by srelee on Oct 5, 2010
Latest reply on Dec 1, 2010 by HEGDE

Hello,

 

I am working ADC of blackfin BF506F processor, when I use the ADC to read multiple channels it is not giving the exact results.

 

I am reading the multiple channel data for every 50us. The interrupt keep on repeating for the data for every 50us.

 

But when i enable two events and try to read the samples, the data is getting corrupted. i.e sometimes channel 1 and channel 2 are getting mixed up, and the status register is showing some times as busy and sometimes as events are pending.

 

I used 111 for ET1 register and 412 for ET2 register. It seems those are not providing the sufficient time for the events, but when I increase the time for these registers, the interrupt time is not sufficient.

 

Even I changed the ACLK divison, and didnt get much help from it.

 

The code is as follows :

 

     *pPORTG_FER=0xffdf;//0xfffd;
    *pPORTH_FER=0xffff;
   
/*
*pSPORT1_RCLKDIV=0x0003;//write( SPORT1_RCLKDIV, 0x0003, 16bit);
//remaining ACM register configuration

 

*pSPORT1_RFSDIV=0x0f;//write( SPORT1_RFSDIV, 0x000f, 16bit);*/

 

*pDMA4_CONFIG=0x0087;//write( SPORT1_RXDMA_CFG, 0x0007, 16bit);

 

*pACM_CTL=0x4001;

 

*pACM_ET0=100;//

 

*pACM_ET15=200;//

 


*pACM_EMSK=0xffff;//write(ACM_EMSK, 0xffff, 16bit); //ACM_EMSK = 'hffff

 

*pACM_ER0=0x011;

 

*pACM_ER15=0x015;

 

*pACM_IMSK=0xffff;//write(ACM_IMSK, 0xffff, 16bit); //ACM_IMSK = 'hffff

 


*pACM_TC1=0x880F;//write(ACM_TC1, 0x8810, 16bit); //Tcsw = 'd10, Th = 'd15, Tz = 'd2
//Set proper frame sync polarity, ADC drive edge, trigger selects and Sport Unit select before enabling SPort.

 

*pACM_TC0=0x01;//write(ACM_TC0, 0x0001, 16bit); //CKDIV = 'd1, Ts = 'd0 (programming ACM_TC0 at the end)

 

*pACM_CTL=0x4002;//write(ACM_CTL, 0x4012, 16bit); //CSPOL=Active Low; ADC negedge drive; TRGSEL0=10; TRGSEL1=00; SPORT Unit 1 Selected;
//Also enable ACM here so that SPort can start receiving clock as soon as it is enabled.

 

*pACM_CTL|=0x01;//Enable ACM
//Sport and DMA configuration and enabling

 

*pPWM0_CTRL=0x03;

 

for(i=0;i<290;i++);                   // to give rising edge
*pPORTGIO_CLEAR=0x0020;
for(i=0;i<290;i++);
*pPORTGIO_SET=0x0020;

 


while((ACM_STAT & 0X0004)!=0X0004)
{
    asm("nop;");
}

 

 

Could any one plesae help me.

 

I have to read four ADC channels in 10us, please help me out in getting the exact timing for the ET registers.

 

Thanks,

Sree

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